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'''Direct bonding''' describes a [[wafer bonding]] process without any additional intermediate layers. The bonding process is based on chemical bonds between two surfaces of any material possible meeting numerous requirements.<ref name="Bag2000" />
These requirements are specified for the wafer surface as sufficiently clean, flat and smooth. Otherwise unbonded areas so called voids, i.e. interface bubbles, can occur.<ref name="PK1999" />
 
The procedural steps of the direct bonding process of wafers any surface is divided into
# wafer preprocessing,
# pre-bonding at room temperature and
# annealing at elevated temperatures.
Even though direct bonding as a wafer bonding technique is able to process nearly all materials, silicon is the most established material up to now. Therefore, the bonding process is also referred to as silicon direct bonding or silicon fusion bonding. The fields of application for silicon direct bonding are, e.g. manufacturing of Silicon on insulator (SOI) wafers, sensors and actuators.<ref name="WFG2003" />
 
== Overview ==
The silicon direct bonding is based on intermolecular interactions including van der Waals forces, hydrogen bonds and strong covalent bonds.<ref name="PK1999" />
The initial procedure of direct bonding was characterized by a high process temperature. There is demand to lower the process temperature due to several factors, one is for instance the increasing number of utilized materials with different coefficients of thermal expansion. Hence, the aim is to achieve a stable and hermetic direct bond at a temperature below 450&nbsp;°C. Therefore, processes for wafer surface activation i.e. plasma treatment or chemical-mechanical polishing (CMP), are being considered and are actively being researched.<ref name="WWGG2010" /> The upper limit of 450&nbsp;°C bases on the limitations of back-end CMOS processing and the beginning of interactions between the applied materials.<ref name="BSY+2004" />
 
== History ==
The adhering effect of smooth and polished solid surfaces is first mentioned by [[John Theophilus Desaguliers|Desaguliers]] (1734). His discovery was based on the friction between two surfaces of solids. The better the surfaces are polished the lower the friction is between those solids. This statement he described is only valid until a specific point. From this point on the friction starts to rise and the surfaces of the solids start to adhere together.<ref name="Mac1997" />
First reports of successful silicon direct bonding were published 1986 among others by J. B. Lasky.<ref name="Las1986" />
 
== Conventional direct bonding ==
{|
|-
[[File:b-d-hydrophilicsisurface.svg|thumb|upright=1.4|Scheme of a hydrophilic silicon surface]]
|-
[[File:b-d-hydrophobicsisurface.svg|thumb|upright=1.4|Scheme of a hydrophobic silicon surface]]
|}
 
Direct bonding is mostly referred to as bonding with silicon. Therefore process techniques are divided in accordance with the chemical structure of the surface in [[hydrophilic]] (compare to scheme of a hydrophilic silicon surface) or [[hydrophobic]] (compare to scheme of a hydrophobic silicon surface).<ref name="Mac1997" />
 
The surface state of a silicon wafer can be measured by the contact angle a drop of water forms. In the case of a hydrophilic surface the angle is small (< 5 °) based on the excellent wettability whereas a hydrophobic surface shows a contact angle larger than 90 °.
{{-}}
 
== Bonding of hydrophilic silicon wafers ==
 
=== Wafer preprocessing ===
[[File:B-d-irphotobondwave.png|thumb|right|Infrared photograph of initiation and propagation of bonding wave in wafer bonding of silicon wafers. (l) wafers are separated by an air layer and the bond process starts by pressure on top wafer. (m) bond wave moves to the edge. (r) a perfectly bonded wafer pair, not reflecting IR light.<ref name="TG1998" />]]
Before bonding two wafers, those two solids need to be free of impurities that can base on particle, organic and/or ionic contamination. To achieve the cleanliness without degrading the surface quality, the wafer passes a dry cleaning, e.g. plasma treatments or UV/ozone cleaning, or a wet chemical cleaning procedure.<ref name="PK1999" />
The utilization of chemical solutions combines sequential steps. An established industrial standard procedure is SC (Standard Clean) purification by RCA. It consists of two solutions
* SC1 (NH<sub>4</sub> OH (29%) + H<sub>2</sub>O<sub>2</sub> (30%) + Deionized-H<sub>2</sub>O [1:1:5]) and
* SC2 (HCl (37%) + H<sub>2</sub>O<sub>2</sub> (30%) + Deionized H<sub>2</sub>O [1:1:6]).
SC1 is used for removing organic contaminations and particles at a temperature of 70&nbsp;°C to 80&nbsp;°C for 5 to 10&nbsp;min and SC2 is used for removing metal ions at 80&nbsp;°C for 10&nbsp;min.<ref name="GD2008" />
Subsequently, the wafers are rinsed with or stored in deionized water. The actual procedure needs to be adapted to every application and device because of usually existing interconnects and metallization systems on the wafer.<ref name="WW1994" />
 
=== Pre-bonding at room temperature ===
[[File:B-d-diagramsurfaceenergy.png|thumb|right|Diagram of the surface energy of hydrophilic and hydrophobic bonded wafers <ref name="PK1999" />]]
Before contacting the wafers, those have to be aligned.<ref name="Bag2000" /> If the surfaces are sufficiently smooth, the wafers start to bond as soon as they get in atomic contact as shown in infrared photograph of a bond wave.
 
The wafers are covered with water molecules so the bonding happens between chemisorbed water molecules on the opposing wafer surfaces. In consequence a significant fraction of Si-OH (silanol) groups start to polymerize at room temperature forming Si-O-Si and water and a sufficient bonding strength for handling the wafer stack is assured. The formed water molecules will migrate or diffuse along the interface during annealing.<ref name="TG1998" />
 
<math>\mathrm{Si-OH + OH-Si \ \xrightarrow{polymerization} \ Si-O-Si + H{_2}O}</math>
 
<math>\mathrm{Si-OH + OH-Si \ \xleftarrow[slow fracture] \ Si-O-Si + H{_2}O}</math>
 
After the pre-bonding in air, in a special gaseous atmosphere or vacuum, the wafers have to pass an annealing process for increasing the bonding strength. The annealing therefore provides a certain amount of thermal energy which forces more silanol groups to react among each other and new, highly stable chemical bindings are formed. The kind of binding which forms directly depends on the amount of energy which has been delivered or the applied temperature respectively. In consequence the bonding strength rises with increasing annealing temperatures.<ref name="PK1999" />
 
=== Annealing at elevated temperatures ===
Between room temperature and 110&nbsp;°C the interface energy remains low, water molecules diffuse at the bond interface, leading to a rearrangement, causing more hydrogen-bonds. At temperatures from 110&nbsp;°C to 150&nbsp;°C silanol groups polymerize to siloxane and water, but also a slow fracture takes place. This reaction equates a thermo dynamical equilibrium and a higher density of silanol groups results in a higher number of siloxane and an increasing bond strength.
 
<math>\mathrm{Si-OH + Si-OH \rightleftharpoons Si-O-Si + HOH}</math>
 
No further processes are observed at the interface between 150&nbsp;°C and 800&nbsp;°C until all OH-groups are polymerized and the composite strength remains constant.
 
Above 800&nbsp;°C native oxide gets viscous and starts to flow at the interface, which increases the area of contacted surfaces. So, the diffusion of trapped hydrogen molecules along the interface is enhanced and interface voids may reduce in size or disappear at all. The annealing process is finished by the cooling of the wafer stack.<ref name="TG1998" />
The interface energy increases to more than 2&nbsp;{{frac|J|m<sup>2</sup>}} at 800&nbsp;°C with a native oxide layer or at 1000&nbsp;°C if the wafers are covered by thermal oxide (compare diagram of surface energy). In case one wafer contains a layer of thermal oxide and the other wafer is covered by a native oxide, the surface energy development is similar to a wafer pair both covered with a native oxide layer.<ref name="PK1999" />{{-}}
 
== Bonding of hydrophobic silicon wafers ==
 
=== Wafer preprocessing ===
A hydrophobic surface is generated if the native oxide layer is removed by either plasma treatment or by fluoride containing etching solutions, e.g. hydrogen fluoride (HF) or ammonium fluoride (NH<sub>4</sub>F). This process enhances the formation of Si-F bonds of the exposed silicon atoms. For hydrophobic bonding it is important to avoid re-hydrophilization, e.g. by rinsing and spin-drying, since Si-F bonds contacted with water result in Si-OH.<ref name="Bag2000" />
 
=== Pre-bonding at room temperature ===
Prior to bonding the surface is covered with hydrogen and fluorine atoms. The bonding at room temperature is mostly based on van-der-Waals forces between those hydrogen and fluorine atoms. Compared to bonding with hydrophilic surfaces, the interface energy is lower directly after contacting. This fact builds up the need for a higher surface quality and cleanliness to prevent unbonded areas and thereby to achieve a full-surface contact between the wafers (compare infrared photograph of a bond wave).<ref name="Bag2000" /> Similar to bonding of hydrophilic surfaces, the pre-bond is followed by an annealing process.
 
=== Annealing at elevated temperatures ===
From room temperature to 150&nbsp;°C no important interface reactions occur and the surface energy is stable. Between 150&nbsp;°C and 300&nbsp;°C more Si-F-H-Si bonds are formed. Above 300&nbsp;°C the desorption of hydrogen and fluoride from the wafer surface leads to redundant hydrogen atoms that diffuse in the silicon crystal lattice or along interface. As a result, covalent Si-Si bonds start to establish between opposing surfaces. At 700&nbsp;°C the transition to Si-Si bonds is completed.<ref name="TSGR1994" />
The bonding energy reaches cohesive strengths of bulk silicon (compare diagram of surface energy).<ref name="PK1999" />
 
== Low temperature direct bonding ==
Even though direct bonding is highly flexible in processing numerous materials, the mismatch of CTE (coefficient of thermal expansion) using different materials is a substantial restriction for wafer level bonding, especially the high annealing temperatures of direct bonding.<ref name="TG1998" />
 
The focus in research is put on hydrophilic silicon surfaces. The increase of the bonding energy is based on the conversion of silanol- (Si-OH) into siloxane-groups (Si-O-Si). The diffusion of water is mentioned as limiting factor because water has to be removed from the interface before close contact of surfaces is established. The difficulty is that water molecules may react with already formed siloxane-groups (Si-O-Si), so the overall energy of adhesion gets weaker.<ref name="PK1999" />
 
Lower temperatures are important for bonding pre-processed wafers or compound materials to avoid undesirable changes or decomposition. The reduction of the required annealing temperature can be achieved by different pretreatments such as:
 
* plasma activated bonding
* ultra high vacuum (UHV)
* surface activation by chemical-mechanical polishing (CMP)
* surface treatment to achieve chemical activation in:
** hydrolyzed tetraalkoxysilanes Si(OR)<sub>4</sub>
** hydrolyzed tetramethoxysilane Si(OCH<sub>3</sub>)<sub>4</sub>
** nitride acid HNO<sub>3</sub>
 
Furthermore, research has shown that a lower annealing temperature for hydrophobic surfaces is possible with wafer pre-treatment based on:
* As<sup>+</sup> implantation
* B<sub>2</sub>H<sub>6</sub> or Ar plasma treatment
* Si sputter deposition
 
== Examples ==
This technique is usable for the fabrication of multi wafer micro structures, i.e. accelerometers, micro valves and micro pumps.
 
== Technical specifications ==
 
{| class="wikitable" width="80%"
|-
| style="background:#B7CEEC" | Materials ||
* Si
* SiO<sub>2</sub>
* Glass-substrate
* Lithium-tantalate (LiTaO<sub>3</sub>)
* stainless steel
|-
| style="background:#B7CEEC" | Temperature ||
* Conventional: <&nbsp;1200&nbsp;°C
* Low temperature: 200&nbsp;-&nbsp;400&nbsp;°C
|-
| style="background:#B7CEEC" | Advantages ||
* high bonding strength
* high temperature stability
* process compatibility to semiconductor technology
* bonding in vacuum or different atmospheric gases
|-
| style="background:#B7CEEC" | Drawbacks ||
* high standards in surface geometry
* high standards in roughness
|-
| style="background:#B7CEEC" | Research ||
* hybrid bonding (metal bonds and SFB simultaneously)
* bonding at T&nbsp;<&nbsp;200&nbsp;°C
* completely dry process including pre-conditioning
|}
 
== See also ==
* [[Wafer bonding]]
* [[Plasma activated bonding]]
* [[Anodic bonding]]
* [[Eutectic bonding]]
* [[Glass frit bonding]]
* [[Adhesive bonding]]
* [[Thermocompression bonding]]
* [[Reactive bonding]]
* [[Bond characterization|Measurement and characterization for wafer level packaging technologies]]
 
== References ==
<references>
 
<ref name="Bag2000">{{Cite thesis|
  author = J. Bagdahn|
  title = Festigkeit und Lebensdauer direkt gebondeter Siliziumwafer unter mechanischer Belastung|
  school = Martin-Luther-Universität Halle-Wittenberg|
  year = 2000}}</ref>
 
<ref name="PK1999">{{cite news|
  author = A. Plössl and G. Kräuter|
  title = Wafer direct bonding: tailoring adhesion between brittle materials|
  journal = Materials Science and Engineering|
  year = 1999|
  volume = 25|
  pages = 1–88|
  number = 1-2|
  url = http://www.sciencedirect.com/science/article/B6TXH-3W48J3B-1/2/4a698948f4384db57b6ea3af7fdf29c3
}}</ref>
 
<ref name="WFG2003">{{cite conference|
  author = M. Wiemer and J. Frömel and T. Gessner|
  title = Trends der Technologieentwicklung im Bereich Waferbonden|
  booktitle = 6. Chemnitzer Fachtagung Mikromechanik & Mikroelektronik|
  year = 2003|
  editor = W. Dötzel|
  volume = 6|
  pages = 178–188|
  organization = Technische Universität Chemnitz|
  publisher = Technische Universität Chemnitz
}}</ref>
 
<ref name="WWGG2010">{{cite news|
  author = D. Wünsch and M. Wiemer and M. Gabriel and T. Gessner|
  title = Low temperature wafer bonding for microsystems using dielectric barrer discharge|
  journal = mst news|
  year = 2010|
  volume = 1/10|
  pages = 24–25}}</ref>
 
<ref name="BSY+2004">{{cite news|
  author = P.R. Bandaru and S. Sahni and E. Yablonovitch and J. Liu and H.-J. Kim and Y.-H. Xie|
  title = Fabrication and characterization of low temperature (<&nbsp;450&nbsp;°C) grown p-Ge/n-Si photodetectors for silicon based photonics|
  journal = Materials Science and Engineering |
  year = 2004|
  volume = 113|
  pages = 79–84|
  number = 1|
  url = http://www.sciencedirect.com/science/article/B6TXF-4D4VHNR-5/2/a8a6b071040c010f1a183eaeaa99bb9f
}}</ref>
 
<ref name="Mac1997">{{cite report|
  author = S. Mack|
  title = Eine vergleichende Untersuchung der physikalisch-chemischen Prozesse
an der Grenzschicht direkt und anodischer verbundener Festkörper|
  institution = Max-Planck-Institut|
  year = 1997|
  address = Jena|
  isbn = 3-18-343602-7|
  publisher = VDI
}}</ref>
 
<ref name="Las1986">{{cite news|
  author = J. B. Lasky|
  title = Wafer bonding for silicon-on-insulator technologies|
  journal = Applied Physical Letter|
  year = 1986|
  volume = 48|
  pages = 78–80|
  number = 1
}}</ref>
 
<ref name="WW1994">{{cite news|
  author = R. F. Wolffenbuttel and K. D. Wise|
  title = Low-temperature silicon wafer-to-wafer bonding using gold at eutectic temperature|
  journal = Sensors and Actuators A: Physical|
  year = 1994|
  volume = 43|
  pages = 223–229|
  number = 1-3|
  url = http://www.sciencedirect.com/science/article/B6THG-448R94P-1B/2/26d3277f4abfd9eb08abeadc39a45c66
}}</ref>
 
<ref name="GD2008">{{cite book|
  title = Introduction to Microsystem Technology: A Guide for Students (Wiley Microsystem and Nanotechnology)|
  publisher = Wiley Publishing|
  year = 2008|
  editor = Ronald Pething|
  author = G. Gerlach and W. Dötzel|
  isbn = 978-0-470-05861-9
}}</ref>
 
<ref name="TG1998">{{cite book|
  title = Semiconductor Wafer Bonding: Science and Technology|
  publisher = Wiley-Interscience|
  year = 1998|
  editor = The Electrochemical Society|
  author = Q.-Y. Tong and U. Gösele|
  edition = 1|
  isbn = 978-0-471-57481-1
}}</ref>
 
<ref name="TSGR1994">{{cite news|
  author = Q.-Y. Tong and E. Schmidt and U. Gösele and M. Reiche|
  title = Hydrophobic silicon wafer bonding|
  journal = Applied Physics Letters|
  year = 1994|
  volume = 64|
  pages = 625–627|
  number = 5|
  url = http://link.aip.org/link/?APL/64/625/1
}}</ref>
 
</references>
 
== External links ==
* [http://www.enas.fraunhofer.de/EN/abteilungen/avt/forschungsschwerpunkte/Waferbonden/Siliziumdirektbonden/index.jsp Direct bonding at Fraunhofer ENAS]
 
[[Category:Electronics manufacturing]]
[[Category:Packaging (microfabrication)]]
[[Category:Semiconductor technology]]
[[Category:Wafer bonding]]

Revision as of 01:33, 27 December 2013

Direct bonding describes a wafer bonding process without any additional intermediate layers. The bonding process is based on chemical bonds between two surfaces of any material possible meeting numerous requirements.[1] These requirements are specified for the wafer surface as sufficiently clean, flat and smooth. Otherwise unbonded areas so called voids, i.e. interface bubbles, can occur.[2]

The procedural steps of the direct bonding process of wafers any surface is divided into

  1. wafer preprocessing,
  2. pre-bonding at room temperature and
  3. annealing at elevated temperatures.

Even though direct bonding as a wafer bonding technique is able to process nearly all materials, silicon is the most established material up to now. Therefore, the bonding process is also referred to as silicon direct bonding or silicon fusion bonding. The fields of application for silicon direct bonding are, e.g. manufacturing of Silicon on insulator (SOI) wafers, sensors and actuators.[3]

Overview

The silicon direct bonding is based on intermolecular interactions including van der Waals forces, hydrogen bonds and strong covalent bonds.[2] The initial procedure of direct bonding was characterized by a high process temperature. There is demand to lower the process temperature due to several factors, one is for instance the increasing number of utilized materials with different coefficients of thermal expansion. Hence, the aim is to achieve a stable and hermetic direct bond at a temperature below 450 °C. Therefore, processes for wafer surface activation i.e. plasma treatment or chemical-mechanical polishing (CMP), are being considered and are actively being researched.[4] The upper limit of 450 °C bases on the limitations of back-end CMOS processing and the beginning of interactions between the applied materials.[5]

History

The adhering effect of smooth and polished solid surfaces is first mentioned by Desaguliers (1734). His discovery was based on the friction between two surfaces of solids. The better the surfaces are polished the lower the friction is between those solids. This statement he described is only valid until a specific point. From this point on the friction starts to rise and the surfaces of the solids start to adhere together.[6] First reports of successful silicon direct bonding were published 1986 among others by J. B. Lasky.[7]

Conventional direct bonding

Scheme of a hydrophilic silicon surface
Scheme of a hydrophobic silicon surface

Direct bonding is mostly referred to as bonding with silicon. Therefore process techniques are divided in accordance with the chemical structure of the surface in hydrophilic (compare to scheme of a hydrophilic silicon surface) or hydrophobic (compare to scheme of a hydrophobic silicon surface).[6]

The surface state of a silicon wafer can be measured by the contact angle a drop of water forms. In the case of a hydrophilic surface the angle is small (< 5 °) based on the excellent wettability whereas a hydrophobic surface shows a contact angle larger than 90 °. Benefits of Residing in a Apartment or Landed property in Singapore Property New Launches & Project Showcase In Singapore Many residential Singapore property sales involve buying property in Singapore at new launches. These are often homes underneath building, being sold new by developers. New Launch Singapore Property, 28 Imperial Residences Coming To Geylang Lorong 26 The property market is slowing down, based on personal property transactions in May Cell Apps FREE Sign Up Log in Property Brokers Feedback

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Bonding of hydrophilic silicon wafers

Wafer preprocessing

File:B-d-irphotobondwave.png
Infrared photograph of initiation and propagation of bonding wave in wafer bonding of silicon wafers. (l) wafers are separated by an air layer and the bond process starts by pressure on top wafer. (m) bond wave moves to the edge. (r) a perfectly bonded wafer pair, not reflecting IR light.[8]

Before bonding two wafers, those two solids need to be free of impurities that can base on particle, organic and/or ionic contamination. To achieve the cleanliness without degrading the surface quality, the wafer passes a dry cleaning, e.g. plasma treatments or UV/ozone cleaning, or a wet chemical cleaning procedure.[2] The utilization of chemical solutions combines sequential steps. An established industrial standard procedure is SC (Standard Clean) purification by RCA. It consists of two solutions

  • SC1 (NH4 OH (29%) + H2O2 (30%) + Deionized-H2O [1:1:5]) and
  • SC2 (HCl (37%) + H2O2 (30%) + Deionized H2O [1:1:6]).

SC1 is used for removing organic contaminations and particles at a temperature of 70 °C to 80 °C for 5 to 10 min and SC2 is used for removing metal ions at 80 °C for 10 min.[9] Subsequently, the wafers are rinsed with or stored in deionized water. The actual procedure needs to be adapted to every application and device because of usually existing interconnects and metallization systems on the wafer.[10]

Pre-bonding at room temperature

Diagram of the surface energy of hydrophilic and hydrophobic bonded wafers [2]

Before contacting the wafers, those have to be aligned.[1] If the surfaces are sufficiently smooth, the wafers start to bond as soon as they get in atomic contact as shown in infrared photograph of a bond wave.

The wafers are covered with water molecules so the bonding happens between chemisorbed water molecules on the opposing wafer surfaces. In consequence a significant fraction of Si-OH (silanol) groups start to polymerize at room temperature forming Si-O-Si and water and a sufficient bonding strength for handling the wafer stack is assured. The formed water molecules will migrate or diffuse along the interface during annealing.[8]

After the pre-bonding in air, in a special gaseous atmosphere or vacuum, the wafers have to pass an annealing process for increasing the bonding strength. The annealing therefore provides a certain amount of thermal energy which forces more silanol groups to react among each other and new, highly stable chemical bindings are formed. The kind of binding which forms directly depends on the amount of energy which has been delivered or the applied temperature respectively. In consequence the bonding strength rises with increasing annealing temperatures.[2]

Annealing at elevated temperatures

Between room temperature and 110 °C the interface energy remains low, water molecules diffuse at the bond interface, leading to a rearrangement, causing more hydrogen-bonds. At temperatures from 110 °C to 150 °C silanol groups polymerize to siloxane and water, but also a slow fracture takes place. This reaction equates a thermo dynamical equilibrium and a higher density of silanol groups results in a higher number of siloxane and an increasing bond strength.

No further processes are observed at the interface between 150 °C and 800 °C until all OH-groups are polymerized and the composite strength remains constant.

Above 800 °C native oxide gets viscous and starts to flow at the interface, which increases the area of contacted surfaces. So, the diffusion of trapped hydrogen molecules along the interface is enhanced and interface voids may reduce in size or disappear at all. The annealing process is finished by the cooling of the wafer stack.[8] The interface energy increases to more than 2 Template:Frac at 800 °C with a native oxide layer or at 1000 °C if the wafers are covered by thermal oxide (compare diagram of surface energy). In case one wafer contains a layer of thermal oxide and the other wafer is covered by a native oxide, the surface energy development is similar to a wafer pair both covered with a native oxide layer.[2]Benefits of Residing in a Apartment or Landed property in Singapore Property New Launches & Project Showcase In Singapore Many residential Singapore property sales involve buying property in Singapore at new launches. These are often homes underneath building, being sold new by developers. New Launch Singapore Property, 28 Imperial Residences Coming To Geylang Lorong 26 The property market is slowing down, based on personal property transactions in May Cell Apps FREE Sign Up Log in Property Brokers Feedback

Individuals all wish to be seen having the identical foresight as the experts in property investment or the massive names in their own fields. Thus the discharge of these tales works to encourage different buyers to observe suit. Bartley Ridge is the most popular new launch in district 13. Irresistible pricing from $1,1xx psf. Bartley Ridge is a ninety nine-12 months leasehold new condominium at Mount Vernon road, good next to Bartley MRT station (CC12). If you want to get more Rehda Johor chairman Koh Moo Hing said potential property consumers in the two areas Http://Modern.Dowatch.Net/Profile/Mic31K/Created/Topics are now adopting a wait-and-see attitude. How can I get the ebrochure and flooring plans of the new launch projects ? The Existing Mortgage on your HDB District 13, Freehold condominium District 11, Freehold Cluster landed house Sea Horizon EC @ Pasir Ris

FindSgNewLaunch is the main Singapore Property web site - one of the best place to begin your actual estate search whether you might be an investor, shopping for for own use, or searching for a spot to lease. With detailed details about each property, together with maps and pictures. We deliver you probably the most complete choice out there. No. For brand spanking new Singapore property gross sales, you possibly can withdraw at any time earlier than booking the unit, without penalty. On the preview, the agent will let you recognize the exact worth for you to resolve whether or not to proceed or not. Solely when you resolve to proceed will the agent book the unit for you. Pending for Sale Licence Approval All Pending for Sale Licence Approval New launch FREEHOLD condominium @ Braddell New launch condominium combined growth at Yishun PROJECT TITLE

To not worry, we'll hold you in our VIP Precedence list for future new launch VIP Preview. We'll contact you to establish your wants and advocate related tasks, both new launch or resale properties that probably match your standards. In case you're looking for resale property, such as these few years old, or just got Short-term Occupation Permit (PRIME), you might click on here right here for fast search and submit your shortlisted listings to us, we'll check and call you for viewing.

Oceanfront Suites, irresistible pricing for a 946 leasehold property with magnificent sea view. Dreaming of basking and feeling the warmth of pure sunlight is now just a click on away. Oceanfront Suites - Seaside residing no longer needs to remain an unattainable This Cambodia new launch, a mega development has also 762 residential models. Additionally located within this Oxley abroad property is a mega shopping center with 627 outlets and also up to 963 available workplace spaces and is surrounded by quite a few Embassy, resorts, Casinos and many vacationer relax space. Belysa EC @ Pasir Ris Esparina EC @ Sengkang Dell Launches World's first Gender-GEDI Female Entrepreneurship Index on 06/04/thirteen by Istanbul, Turkey. Paris Ris EC @ Paris Ris in search of indication of curiosity.

The developer should open a Venture Account with a financial institution or monetary establishment for every housing venture he undertakes, before he's issued with a Sale License (license to sell models in his development). All payments from buyers before completion of the challenge, and construction loans, go into the mission account. New launch rental LA FIESTA, an thrilling new condominium located along Sengkang Square / Compassvale Highway is a brief stroll to the bustling Sengkang City Centre the place the bus interchange, Sengkang MRT and LRT stations are located. Glorious location,Premium rental with Bayfront resort lifestyle theme and views ofwaterscape. Close to EC pricing - Worth for cash! Apr 02, 2013 Sengkang New Rental Launch, La Fiesta- Sengkang MRTstation at your gate.

As The Hillford property launch at Jalan Jurong Kechil may be very close to to beauty world mrt , the environment for the plot of land which belongs to World Class Land remains very upbeat as it is rather close to to Holland Village. Review now by visiting the brand new apartment pages on our website, each displaying complete particulars and the latest information of each new launch. You can even contact us directly to obtain quick & correct answers to all of your questions with high of the road service. An inevitable conclusion is that costs within the property market have just set new highs. The apparent connotation for potential buyers is to take motion now before prices bounce again. tract and points to his property line, marked by a big maple in a sea of Search SG Developersale.com

Bonding of hydrophobic silicon wafers

Wafer preprocessing

A hydrophobic surface is generated if the native oxide layer is removed by either plasma treatment or by fluoride containing etching solutions, e.g. hydrogen fluoride (HF) or ammonium fluoride (NH4F). This process enhances the formation of Si-F bonds of the exposed silicon atoms. For hydrophobic bonding it is important to avoid re-hydrophilization, e.g. by rinsing and spin-drying, since Si-F bonds contacted with water result in Si-OH.[1]

Pre-bonding at room temperature

Prior to bonding the surface is covered with hydrogen and fluorine atoms. The bonding at room temperature is mostly based on van-der-Waals forces between those hydrogen and fluorine atoms. Compared to bonding with hydrophilic surfaces, the interface energy is lower directly after contacting. This fact builds up the need for a higher surface quality and cleanliness to prevent unbonded areas and thereby to achieve a full-surface contact between the wafers (compare infrared photograph of a bond wave).[1] Similar to bonding of hydrophilic surfaces, the pre-bond is followed by an annealing process.

Annealing at elevated temperatures

From room temperature to 150 °C no important interface reactions occur and the surface energy is stable. Between 150 °C and 300 °C more Si-F-H-Si bonds are formed. Above 300 °C the desorption of hydrogen and fluoride from the wafer surface leads to redundant hydrogen atoms that diffuse in the silicon crystal lattice or along interface. As a result, covalent Si-Si bonds start to establish between opposing surfaces. At 700 °C the transition to Si-Si bonds is completed.[11] The bonding energy reaches cohesive strengths of bulk silicon (compare diagram of surface energy).[2]

Low temperature direct bonding

Even though direct bonding is highly flexible in processing numerous materials, the mismatch of CTE (coefficient of thermal expansion) using different materials is a substantial restriction for wafer level bonding, especially the high annealing temperatures of direct bonding.[8]

The focus in research is put on hydrophilic silicon surfaces. The increase of the bonding energy is based on the conversion of silanol- (Si-OH) into siloxane-groups (Si-O-Si). The diffusion of water is mentioned as limiting factor because water has to be removed from the interface before close contact of surfaces is established. The difficulty is that water molecules may react with already formed siloxane-groups (Si-O-Si), so the overall energy of adhesion gets weaker.[2]

Lower temperatures are important for bonding pre-processed wafers or compound materials to avoid undesirable changes or decomposition. The reduction of the required annealing temperature can be achieved by different pretreatments such as:

  • plasma activated bonding
  • ultra high vacuum (UHV)
  • surface activation by chemical-mechanical polishing (CMP)
  • surface treatment to achieve chemical activation in:
    • hydrolyzed tetraalkoxysilanes Si(OR)4
    • hydrolyzed tetramethoxysilane Si(OCH3)4
    • nitride acid HNO3

Furthermore, research has shown that a lower annealing temperature for hydrophobic surfaces is possible with wafer pre-treatment based on:

  • As+ implantation
  • B2H6 or Ar plasma treatment
  • Si sputter deposition

Examples

This technique is usable for the fabrication of multi wafer micro structures, i.e. accelerometers, micro valves and micro pumps.

Technical specifications

Materials
  • Si
  • SiO2
  • Glass-substrate
  • Lithium-tantalate (LiTaO3)
  • stainless steel
Temperature
  • Conventional: < 1200 °C
  • Low temperature: 200 - 400 °C
Advantages
  • high bonding strength
  • high temperature stability
  • process compatibility to semiconductor technology
  • bonding in vacuum or different atmospheric gases
Drawbacks
  • high standards in surface geometry
  • high standards in roughness
Research
  • hybrid bonding (metal bonds and SFB simultaneously)
  • bonding at T < 200 °C
  • completely dry process including pre-conditioning

See also

References

  1. 1.0 1.1 1.2 1.3 Template:Cite thesis
  2. 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 Template:Cite news
  3. 55 years old Systems Administrator Antony from Clarence Creek, really loves learning, PC Software and aerobics. Likes to travel and was inspired after making a journey to Historic Ensemble of the Potala Palace.

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  4. Template:Cite news
  5. Template:Cite news
  6. 6.0 6.1 Template:Cite report
  7. Template:Cite news
  8. 8.0 8.1 8.2 8.3 20 year-old Real Estate Agent Rusty from Saint-Paul, has hobbies and interests which includes monopoly, property developers in singapore and poker. Will soon undertake a contiki trip that may include going to the Lower Valley of the Omo.

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  9. 20 year-old Real Estate Agent Rusty from Saint-Paul, has hobbies and interests which includes monopoly, property developers in singapore and poker. Will soon undertake a contiki trip that may include going to the Lower Valley of the Omo.

    My blog: http://www.primaboinca.com/view_profile.php?userid=5889534
  10. Template:Cite news
  11. Template:Cite news

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