Shear wave splitting: Difference between revisions

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The interconnection network is the heart of a parallel processing system, and many systems have failed to meet their design goals for the design of their essential components. The [[Bandwidth (signal processing)|bandwidth]] limitation of the electronic interconnects prompted the need for exploring alternatives that overcome this limitation. Optics is considered as an alternative that is capable of providing [[inherent]][[communication]], [[parallel computing|parallelism]], high [[:wikt:connectivity|connectivity]] and large bandwidth. When the communication distances exceed few millimeters, optical interconnects provide advantage over the electronic interconnects in term of [[Electric power|power]], [[speed]] and [[crosstalk]] property. Therefore, in the construction of very powerful and large [[multiprocessor]] systems, it is advantageous to interconnect close processors physically using electronic links and far processors (kept in other package) using optical links. Thus we use optical network like [[OMTSE]], [[OTIS (optical network)|OTIS]], and [[OMULT]] etc.  The OMTSE network consists of two different systems called as optical and electrical. In this network there are using two layer of [[TSE (network)|TSE]] network with a complete [[binary tree]]s of height one and the roots of these binary trees are connected with [[Shuffle-Exchange]] fashion.


An '''optoelectronic system''' is basically a [[wikt:hybrid|hybrid]] system that exploits both the  advantages of [[Electronic communication|electronic]] and [[optical communication]].<ref>[http://www.scpe.org/vols/vol09/no1/SCPE_9_1_08.pdf  SCALABLE  COMPUTING : PRACTICE  AND  EXPERIENCE]</ref><ref>[http://www.ieeexplore.ieee.org/iel5/4289832/4289833/04289971.pdf?arnumber  IEEE]</ref> Various models of optoelectronic [[parallel computers]] have been proposed in recent years. '''OMTSE (Optical Multi-Trees with Shuffle Exchange)''' using both electronic and optical links among processors. The processors are organized in the form of an n × n [[Vector processor|array]] of certain groups each containing 3n/2 [[Node (networking)|nodes]]. It can be noted that the entire [[network topology]] is almost regular  with an O(log n) diameter.
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==Topology of OMTSE==
 
The network consists of a total of <math>3n^3/2</math> processors are built around <math>n^2</math> factor networks called TSE networks. Each factor network consists of n leaf nodes. The diameter and bisection width of the OMTSE network is shown to be 6 log n − 1 and <math>(n^3)/4</math>.
 
== References==
{{reflist}}
 
[[Category:Parallel computing]]

Latest revision as of 15:22, 17 October 2014


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